The invention relates to a semiconductor device and more particularly, to a MOSFET having a semiconductor projection in the shape of a T.
A typical known MOSFET having a semiconductor projection is described in "High Speed and Highly reliable Trench MOSFET with Dual-Gate", 1988 SYMPOSIUM ON VLSI TECHNOLOGY, Digest of Technical Papers pp. 23-24. FIG. 1 is a cross-sectional view of the MOSFET described in the paper. Referring to FIG. 1, the MOSFET has a silicon projection 2 in the shape of an "I" on a p-well region 1' formed on a silicon substrate 1. The silicon projection 2 is formed by dry-etching the p-well region 1'. Highly concentrated impurity regions 3 are formed in the p-well region 1' around the silicon projection 2 and on the top of the silicon projection 2. A gate oxide layer 4 is formed on the side of the silicon projection 2. A polycrystalline silicon (hereafter poly-Si) layer 5 having low electrical resistance is formed on the gate oxide layer 4.
The above-mentioned MOSFET has a high transconductance (g.sub.m). Where the width L.sub.s of the silicon projection 2 is narrow, the MOSFET has a remarkable high transconductance g.sub.m. Moreover, the MOSFET has less of a decrease of its transconductance g.sub.m in comparison to planar MOSFET's, as measured by a stress test.
However, since the silicon projection 2 is formed by dry-etching, there is a probability of serious damage, such as crystal defects, occurring during production on the side of the silicon projection 2. A high temperature treatment can recover some but not all of the damage. Furthermore, where the width of the silicon projection 2 is narrow, it is difficult to assure contact between the highly concentrated impurity region 3 on the top of the silicon projection 2 and an electrode.